Voltage fluctuations in IC power supply distribution
Autor: | Andrade Miceli, Dennis Michael, Martorell Cid, Ferran, Moll Echeto, Francisco de Borja, Rubio Sola, Jose Antonio |
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Přispěvatelé: | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica, Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
Jazyk: | angličtina |
Rok vydání: | 2007 |
Předmět: |
Integrated circuits Very large scale integration Reliability
Power supply noise Circuits integrals digitals -- Disseny i construcció Integrated circuits Very large scale integration Design and construction Hardware_INTEGRATEDCIRCUITS Integrated circuits Ultra large scale integration Integrated circuits Hardware_PERFORMANCEANDRELIABILITY Digital integrated circuits Power supply Circuits integrats -- CMOS Enginyeria electrònica::Microelectrònica::Circuits integrats [Àrees temàtiques de la UPC] Digital circuits Design and construction Enginyeria electrònica::Microelectrònica::Processadors digitals [Àrees temàtiques de la UPC] |
Zdroj: | UPCommons. Portal del coneixement obert de la UPC Universitat Politècnica de Catalunya (UPC) Recercat. Dipósit de la Recerca de Catalunya instname |
Popis: | The supply voltage decrease and power consumption increase of modern ICs made the requirements for low voltage fluctuation caused by packaging and on-chip parasitic impedances more difficult to achieve. Most of the research works on the area assume that all the nodes of the chip are fed at the same voltage, in such a way that the main cause of disturbance or fluctuation is the parasitic impedance of packaging. In the paper an approach to analyze the effect of high and fast current demands on the on-chip power supply network. First an approach to model the entire network by considering a homogeneous conductive foil is presented. The modification of the timing parameters of flipflops caused by spatial voltage drops through the IC surface are also investigated. |
Databáze: | OpenAIRE |
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