Memory Window in Si:HfO 2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes
| Autor: | Laguerre, J., Bocquet, Marc, Billoint, O., Martin, S., Coignus, J., Carabasse, C., Magis, T., Dewolf, T., Andrieu, F., Grenouillet, L. |
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| Přispěvatelé: | Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (IM2NP), Aix Marseille Université (AMU)-Université de Toulon (UTLN)-Centre National de la Recherche Scientifique (CNRS), IEEE |
| Jazyk: | angličtina |
| Rok vydání: | 2023 |
| Předmět: | |
| Zdroj: | IMW 2023-2023 IEEE International Memory Workshop IMW 2023-2023 IEEE International Memory Workshop, IEEE, May 2023, Monterey (CA), United States. pp.1-4, ⟨10.1109/IMW56887.2023.10145972⟩ |
| DOI: | 10.1109/IMW56887.2023.10145972⟩ |
| Popis: | International audience; The Memory Window (MW) of BEOL-integrated Si:HfO 2-based 16kbit 1T1C FeRAM arrays is shown to be significantly improved (×3) by etching the ferroelectric (FE) film of the Ferroelectric CAPacitor (FeCAP). To estimate the MW evolution in larger arrays at advanced technology nodes, a Preisach current-based compact model is developed, calibrated on measured FeCAP electrical characteristics and validated at various operating voltages. Electrical simulations of an elementary 1T1C 16kbit FeRAM array-like structure using Siemens Eldo show that scaling the transistor (1T) at advanced technology nodes can be beneficial for the MW. FE film thickness reduction below 10nm will also be requested for low voltage applications. |
| Databáze: | OpenAIRE |
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