CMOS design of a current-mode multiplier/divider circuit with applications to fuzzy controllers
| Autor: | Baturone Castillo, María Iluminada, Sánchez Solano, Santiago, Huertas Díaz, José Luis |
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| Přispěvatelé: | Universidad de Sevilla. Departamento de Electrónica y Electromagnetismo |
| Jazyk: | angličtina |
| Rok vydání: | 2000 |
| Předmět: | |
| Zdroj: | idUS. Depósito de Investigación de la Universidad de Sevilla instname |
| Popis: | Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design based on current-mode data converters is presented herein. Continuous-time algorithmic converters are chosen to reduce the control circuitry and to obtain a modular design based on a cascade of bit cells. Several circuit structures to implement these cells are presented and discussed. The one that is selected enables a better trade-off speed/power than others previously reported in the literature while maintaining a low area occupation. The resulting multiplier/divider circuit offers a low voltage operation, provides the division result in both analog and digital formats, and it is suitable for applications of low or middle resolution (up to 9 bits) like applications to fuzzy controllers. The analysis is illustrated with Hspice simulations and experimental results from a CMOS multiplier/divider prototype with 5-bit resolution. Experimental results from a CMOS current-mode fuzzy controller chip that contains the proposed design are also included. |
| Databáze: | OpenAIRE |
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