Process challenges and perspectives of vertical GaN power transistors on foreign substrates
| Autor: | Huber, Christian, Regensburger, S., Bahat-Treidel, E., Medjdoub, F, Baringhaus, Jens |
|---|---|
| Přispěvatelé: | Bosch, Ferdinand-Braun-Institut für Höchtstfrequenztechnik (FBH), Forschungsverbund Berlin e.V. (FVB) (FVB), WIde baNd gap materials and Devices - IEMN (WIND - IEMN), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL)-Centrale Lille-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-JUNIA (JUNIA), Université catholique de Lille (UCL)-Université catholique de Lille (UCL), This project has received funding from the ECSEL Joint Undertaking (JU) under grant agreement No 101007229. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Germany, France, Belgium, Austria, Sweden, Spain, Italy., Renatech Network, CMNF, European Project: 101007229,H2020,H2020-ECSEL-2020-2-RIA-two-stage,YESvGaN(2021) |
| Jazyk: | angličtina |
| Rok vydání: | 2022 |
| Předmět: | |
| Zdroj: | Proceeding of IWN2022 International Workshop on Nitride Semiconductors, IWN 2022 International Workshop on Nitride Semiconductors, IWN 2022, Oct 2022, Berlin, Germany |
| Popis: | International audience; Despite considerable progress in their process technology during the last years, vertical GaN power transistors are currently not finding market entry due to the small size and high cost of native GaN substrates. This issue can in principle be circumvented by using heteroepitaxial GaN on more affordable substrates. Recently, first demonstrations of vertical diodes [1] and transistors [2] for GaN-on-silicon have been published where vertical current flow was enabled by backside removal of the silicon substrate and the isolating buffer layers. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|