Design of a smart camera SoC in a 3D-IC technology
| Autor: | Carmona-Galán, R., Fernández-Berni, J., Vargas-Sierra, S., Liñán-Cembrano, G., Rodríguez-Vázquez, Ángel, Brea, V. M., Suárez, Marta, Cabello, D. |
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| Jazyk: | angličtina |
| Rok vydání: | 2012 |
| Zdroj: | Digital.CSIC. Repositorio Institucional del CSIC instname |
| Popis: | Trabajo presentado al "WASC 2012" celebrado en Francia del 5 al 6 de Abril del 2012. Conventional digital signal processing architectures introduce data bottlenecks and are inefficient when dealing with multidimensional sensory signals; Architectures adapted to the nature of the stimulus are more efficient in terms of power consumption per operation but...;Concurrent sensing, processing and memory in planar technologies introduces serious limitations to image resolution and image size via the penalties in fill factor and pixel pitch; 3D integrated circuit technologies with a dense TSV distribution permits eliminating data bottlenecks without degrading image resolution and size. This work is financially supported by Andalusian Regional Government, through project 2006‐TIC‐2352, the Spanish Ministry of Economy and Competitiveness, through projects TEC 2009‐11812 and IPT‐2011‐1625‐430000, both co‐funded by the EU‐ERDF and by the Office of Naval Research (USA), through grant N000141110312. |
| Databáze: | OpenAIRE |
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