IDDQ Testing of Submicron CMOS—by Cooling?

Autor: Rencz, M., Szekely, V., Töröka, S., Torki, K., Courtois, B.
Přispěvatelé: Budapest University of Technology and Economics [Budapest] (BME), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)
Jazyk: angličtina
Rok vydání: 2000
Předmět:
Zdroj: Journal of Electronic Testing
Journal of Electronic Testing, Springer Verlag, 2000, October, Volume 16, Number 5, pp.453-461. ⟨10.1023/A:1008364515030⟩
ISSN: 0923-8174
1573-0727
Popis: The usability of I DDQ testing is limited by the subthreshold currents of the low-V T, submicron MOS transistors in the low bias voltage circuits. The paper addresses the cooling of the chip in order to overcome this problem. Experimental results concerning the effect of cooling on the threshold voltage and subthreshold current are presented in the range of –75...25 Centigrade. The subthreshold currents decrease by a factor of about 100–1000 by cooling-down the chip to –75 Centigrade.
Databáze: OpenAIRE
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