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[ABSTRACT]The recent development of semiconductor technology has achieved downsized, large-scaled and low-power VLSI (Very Large-Scale Integration) systems. However, it makes the soft error issue more serious. Soft errors occur due to a transient-induced event caused by striking of high energy neutron radiation from cosmic rays. The striking on the silicon bulk generates electrons and holes, which are collected at a drain node. The collected electrons or holes lead to transient voltage. As a result, values erroneously change in storage elements, such as memory. Traditionally only soft errors on memory system have been serious. However, in recent VLSI systems, soft errors on logic circuit as well as memory system are also serious because recent VLSIs do not tolerate pulses with a short period of time vibration phenomenon. To resolve this issue, researchers (including the authors' group) have presented several soft error tolerate schemes. Most of them provide only simulation results; it is not known that which scheme is best in actual devices. We are making experimentation on an actual device. In this experimentation, several flip-flops are mounted on the actual device; the mounted flip-flops consist of several existing soft error hardened latches, such as DICE, and normal latches not hardened. Neutron beam is delivered to the device. The device is observed by an observation equipment mounted on Raspberry Pi during radiation. |
