Implications of Small Geometry Effects on gm/ID Based Design Methodology for Analog Circuits

Autor: OU, jack, Maris Ferreira, Pietro
Přispěvatelé: California State University [Northridge] (CSUN), Laboratoire Génie électrique et électronique de Paris (GeePs), Université Paris-Sud - Paris 11 (UP11)-Université Pierre et Marie Curie - Paris 6 (UPMC)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), California State University, Northridge ( CSUN ), Laboratoire Génie électrique et électronique de Paris ( GeePs ), Centre National de la Recherche Scientifique ( CNRS ) -CentraleSupélec-Université Pierre et Marie Curie - Paris 6 ( UPMC ) -Université Paris-Sud - Paris 11 ( UP11 )
Jazyk: angličtina
Rok vydání: 2018
Předmět:
Zdroj: IEEE Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs, Institute of Electrical and Electronics Engineers, 2018, ⟨10.1109/TCSII.2018.2846484⟩
IEEE Transactions on Circuits and Systems. Part II, Express Briefs
IEEE Transactions on Circuits and Systems. Part II, Express Briefs, IEEE, 2018
ISSN: 1549-7747
1558-3791
DOI: 10.1109/TCSII.2018.2846484⟩
Popis: International audience; Small geometry effects have become increasingly important in analog circuits as transistors continue to shrink. As a result, transconductance-to-drain current (gm/ID) transistor parameters are no longer width-independent. In this brief, a procedure to develop “unit-sized” transistors with minimal sensitivity to small geometry effects is proposed. It is shown that by using the “unit-sized” transistors, the impact of small geometry effects on gm/ID dependent parameters such as current density and self gain can be reduced to 3.6 percent and 1.5 percent respectively.
Databáze: OpenAIRE