GNU simulators supporting Verilog-A compact model standardization
| Autor: | Brinson, Mike, Jahn, Stefan, Margraf, Michael, Parruitte, Hélène, Ardouin, B., Nenzi, Paolo, Lemaitre, Laurent |
|---|---|
| Jazyk: | angličtina |
| Rok vydání: | 2007 |
| Předmět: | |
| Zdroj: | MOS-AK international Meeting |
| Popis: | This poster explains about Qucs: Quite Universal Circuit Simulator, ADMS: Verilog-A Compact Model Generator and NGSpice: mixed-level/mixed-signal circuit simulator. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|