Resistive Memory in 2T1R Architecture Based on Si MOSFETs and Nanocomposite Memristors

Autor: Surazhevsky, I. A., Chernoglazov, K. Yu., Alyaev, I. V., Grischenko, Yu. V., Ichyotkin, D. V., Emelyanov, A. V., Grigoriev, T. E., Kalyonov, A. D., Iliasov, A. I., Demin, V. A., Rylkov, V. V.
Zdroj: Nanobiotechnology Reports; June 2024, Vol. 19 Issue: 3 p468-474, 7p
Abstrakt: A manufacturing sequence for the formation of controlled memory in the 2T1R architecture using Si MOSFETs (metal-oxide-semiconductor field-effect transistor) and memristor crossbars based on thin layers of CoFeB-LiNbO3nanocomposite and a-LiNbO3is developed. It is shown that when using Cu top electrodes in memristors, relatively small resistive-switching voltages and currents (2.5 V and 0.4 mA) are achieved, which are suitable for creating a memory microchip within the MPW technology service (https://mpw.miet.ru/).
Databáze: Supplemental Index