| Abstrakt: |
In recent years, there has been an explosion in the power requirement of modern electronic chips [1]. Although the switching power (CV2f) per transistor has remained nearly constant with scaling, the number of transistors per unit area has grown exponentially leading to a significant increase in the power density. This higher power density coupled with a larger chip size, due to increased functionality, has resulted in this explosion in power requirement. Due to excessive losses (ohmic) in delivering power at low voltages, this power has to be delivered at high voltages and then down-converted to the required chip voltage at the Point of Load (POL) [2]. This requires the use of high efficiency (>95%), miniaturized voltage convertors which need passive components like capacitors and inductors that can handle high voltages, currents, and switching frequencies, with small form factors [2]. At the other end, we have microwave and RF electronic systems in the emerging fields of high-speed communication (5G+) where impedance matching networks are needed [3]. These impedance matching networks require the use of capacitors and inductors with a different set of performance specs like high quality factor (Q), self-resonance frequency, & densities [4]. In both cases, the key bottleneck is the design, fabrication and integration of high quality miniaturized passive components that meets all the required performance specs. This can however be quite challenging and complex. In this light, the following article serves as a tutorial for new designers to understand the basic principles of integrated passive's design and integration. The several nuances and challenges that will be faced in the design flow are detailed and explored. |
