| Autor: |
Kosuge, Atsutake, Hsu, Yao-Chung, Sumikawa, Rei, Hamada, Mototsugu, Kuroda, Tadahiro, Ishikawa, Tomoe |
| Zdroj: |
IEEE Micro; November 2023, Vol. 43 Issue: 6 p19-27, 9p |
| Abstrakt: |
A neuromorphic architecture is suitable for low-power tiny-machine learning processors. However, the large number of synapses utilized in recent deep neural networks require multichip implementation, resulting in large power consumption due to chip-to-chip interfaces. Here, we present a 10.7-µJ/frame single-chip neuromorphic field-programmable gate array (FPGA) processor. To reduce the required hardware (HW) resources, we have developed two techniques. The first is a dendrite-inspired nonlinear neural network that mimics various nonlinear functions of dendrite spines in the human cerebrum. The second is a line-scan-based architecture that reduces the total amount of HW resources. The 14-layer convolutional neural network (CNN), which achieves an 88% accuracy with the CIFAR-10 dataset, was implemented on a single FPGA board. Compared to a state-of-the-art spiking CNN-based neuromorphic FPGA processor, the energy efficiency of the proposed architecture is improved by a factor of 94.4 while achieving a 6% better classification accuracy. |
| Databáze: |
Supplemental Index |
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