| Autor: |
Deshmukh, Pratik, Mali, Madan, Raut, Vrushali G. |
| Zdroj: |
International Journal of Circuits and Architecture Design; 2014, Vol. 1 Issue: 3 p258-268, 11p |
| Abstrakt: |
This paper presents operational transconductance amplifier, designed in area effective 90 nm tech node. Implementation of an amplifier having transistors operation in sub-threshold region is a very crucial task. In this design, complementary input pairs are used to achieve rail to rail input operation. To achieve enhanced slew-rate of 0.055 V/µs with sub-threshold operation, the adaptive biasing circuitry is used. Class AB output stage is used to provide good performance of 44 dB with ultralow ~4 µW power consumption. And all the transistors in the circuitry are biased in sub-threshold region to operate circuit at very low supply voltage of 0.4V. To increase CMRR of an operational transconductance amplifier, a common mode feed forward circuit is used, with keeping DC gain almost constant. Layout designed for proposed circuit requires very less area of 38.05 µm × 33.8 µm on die. |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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