| Autor: |
Chatterjee, Swagata Roy, Chowdhury, Jayanta, Dhabal, Supriya, Chakraborty, Mohuya |
| Zdroj: |
International Journal of Wireless and Mobile Computing; 2020, Vol. 19 Issue: 4 p340-351, 12p |
| Abstrakt: |
This paper aims to design a simple hardware architecture of Multilayer Feedforward Neural Network (MFNN) and verify its performance in the detection of vacant/busy state of channels. A single neuron with tansigmoid activation function is proposed utilising the rule of matrix multiplication for simplification in computation. The proposed hardware module of the single neuron, utilising parallel processing, is assembled to obtain the architecture of desired MFNN. The area optimised hardware architecture of MFNN is achieved by reutilising the hardware resources. The hardware module of the single neuron is compared with the allied design methods which exhibits its outperformance in terms of mean square error and accuracy over the existing ones. The proposed optimised MFNN provides almost 62% reduction in hardware resources as compared with standard non-optimised MFNN. Further, the performance analyses of proposed hardware architectures demonstrate almost 90% accuracy in the detection of both vacant and busy states of channels. |
| Databáze: |
Supplemental Index |
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