| Autor: |
Chleirigh, Cait Ni, Wang, Xiaoru, Rimple, Gana, Wang, Yun, Canonico, Michael, Theodore, David D., Olubuyide, Oluwamuyiwa, Hoyt, Judy L. |
| Zdroj: |
ECS Transactions; October 2006, Vol. 3 Issue: 2 p355-362, 8p |
| Abstrakt: |
Sub-melt temperature laser spike annealing is investigated as a low thermal budget solution for source/drain annealing in strained Si/ strained Si0.3Ge0.7/relaxed Si0.7Ge0.3 dual channel p-MOSFETs. A constant hole mobility enhancement factor of 4x is maintained relative to Si control MOSFETs, for laser annealing temperatures up to approximately 1000oC. This temperature is significantly higher than possible with rapid thermal annealing, due to device degradation associated with Ge diffusion during rapid thermal annealing. Mobility is found to decrease dramatically in the heterostructure MOSFETs for laser annealing temperatures above ~ 1000oC. SIMS analysis shows very little Ge diffusion, even for an 1100oC laser anneal. Capacitance-voltage analysis and Raman spectroscopy suggest that there is some strain relaxation for the 1100oC anneal. Transmission electron microscopy analysis indicates localized strain variation and defects on the order of 107 cm-2 for the heterostructure MOSFET subject to laser annealing at 1100oC. The mobility degradation for LSA temperatures above ~ 1000oC is consistent with a combination of strain relaxation and scattering from defects. |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
|
