| Abstrakt: |
The advances in interconnection technology have played a key role in allowing continued improvements in manufacturing of an ever expanding list of semiconductor devices. Chemical Mechanical Planarization (CMP) is a key enabling technology to generate extremely flat and smooth surface at several critical steps in this manufacturing process flow. From the time CMP was first introduced two decades ago to flatten/planarize oxide inter-level dielectric layers, it has come a long way and is now used for tungsten for contacts or vias, for shallow trench isolation and for copper interconnects in dual damascene architecture. Along the way, many integration schemes now require the use of other low-k dielectric films, all of which are planarized using CMP process. In this review paper, various factors influencing CMP will be discussed. The discussion will focus on material challenges to develop consumables such as pad, slurry, post CMP cleaning solution etc. and the challenges for integrating different material stack including the cost of ownership issue. The authors will also provide some direction related to new applications under development and future potential direction. |
