| Autor: |
Liu, Jinhua, Zhou, June, Wang, William, Guo, Rita, Zhang, Leo, Shen, ZhaoXu, Wang, Brisk, Zhou, Allan, Hao, Humbert, Cui, Jimmy, Ning, Jay |
| Zdroj: |
ECS Transactions; March 2011, Vol. 34 Issue: 1 p103-106, 4p |
| Abstrakt: |
It is shown in the study that Arsenic improves 30% device Idsat variation compared to Ph implantation. SRAM Vccmin value may be improved around 4% too. While it is found that, compared to Ph implantation, Arsenic critically increases junction leakage current, which may account for more than half part of the total off current for high threshold voltage (Vth) device with gate length less than 50nm. The large junction leakage current also leads to 5% device performance degradation and SRAM stand by leakage current (Istby) 15% increasing. Device reliability study exhibits that PMOS negative bias temperature instability (NBTI) performance is deteriorated by Arsenic implantation. |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
|
