The Effects of Wet Surface Treatments on Amorphous Silicon Annealing and Gate Breakdown Voltage

Autor: Tiwari, Chandra S, Guo, Tony, Breyfogle, Chris, Zhang, John, Mitro, Henis, Olmer, Len, Pohlman, Doug
Zdroj: ECS Transactions; April 2013, Vol. 50 Issue: 38 p1-8, 8p
Abstrakt: The formation of CMOS transistors requires the integration of several steps including deposition, annealing, cleaning, and patterning. This paper investigates the nature of the interface between amorphous silicon (a-Si) and silicon nitride (Si3N4), and its impact on the gate breakdown voltage. It has been found that a continuous native oxide between a-Si and Si3N4 is critical in preventing the agglomeration of silicon during high temperature annealing.
Databáze: Supplemental Index