| Autor: |
Isil, Omur, Robert, Judson, Royer, Cyrille Le, Vanamurthy, Laks, Feudel, Thomas, Heyne, Tobias, Gerber, Ralf, Lenski, Markus, Jansen, Soren, Utess, Dirk, Klein, Christoph, Peeva, Anita, Robert, George, McArdle, Timothy J, Barge, David, Divay, Alexis, Lehmann, Steffen, Smith, Elliot, Peters, Carsten, Sachse, Uwe |
| Zdroj: |
ECS Transactions; July 2018, Vol. 86 Issue: 7 p199-206, 8p |
| Abstrakt: |
Fully Depleted Silicon-On-Insulator (FDSOI) technology is a strong competitor in particular for RF applications, providing high performance at low manufacturing cost. In this technology, PFET devices utilize an epitaxially grown pFET raised source/drain (pRSD). However, the pRSD structure adds to the parasitic capacitance to the gate which is a detractor of RF performance. We demonstrate a faceted epitaxial RSD process that reduces this parasitic capacitance (CMiller) by up to -25% and further improves the already high RF pFET fmax by +18%. In addition, we show improved defectivity (-80% non-selective growth defect count reduction), and reduced within-wafer CMiller variability (1-s reduced by -42%). All of these make faceted pRSD a powerful technique to significantly improve device performance in FDSOI. |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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