Autor: |
Kogut, Igor T., Holota, Victor I., Druzhinin, Anatoly, Dovhij, V.V. |
Zdroj: |
Journal of Nano Research; February 2016, Vol. 39 Issue: 1 p228-234, 7p |
Abstrakt: |
This paper presents the device-technological simulation of local 3D SOI structures. These structures are created by use microcavities under surface of silicon wafer. Is shown that proposed microcavities could be use as a constructive material for CMOS transistor array on the bulk silicon and 3D SOI-CMOS transistor array, as well as the sensitive elements and their combinations. Such structures allow creation and monolithic integration the CMOS, SOI-CMOS circuits and sensitive elements for IC and SoC. |
Databáze: |
Supplemental Index |
Externí odkaz: |
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