| Autor: |
Arulpragasam, Giggi, Lary, Sullivan, Wu, Chin-Chang |
| Zdroj: |
IEEE Transactions on Computers; February 1985, Vol. 34 Issue: 2 p149-160, 12p |
| Abstrakt: |
This paper presents the design and breadboard implementation of an experimental multiprocessor (mP) whose objectives were 1) to provide modularity of performance over the range of 0.2 million instructions/s (mips) to about 3 mips and 2) to optimize cost-performance over this selected range by exploiting the high technology of microprocessors and RAM's. |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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