| Abstrakt: |
Aside from the implementation of combinatorial logic and cache memory in the SOI technology, as described in chapters 4, 5 and 6, other selected functions require additional attention to insure they will function as they did in bulk CMOS. Those circuits include SOI timing elements, latches, and input/output driver/receivers, and are described in sections 7.2, 7.3, and 7.4. Other specific circuits deserve attention, if only by virtue of the means by which they cope with the absence of substrate. Electrostatic discharge protection elements, described in Section 7.5, is one such functional unit. This book will not be discussing analog design techniques beyond the circuits mentioned above as it is beyond the scope of this text. [ABSTRACT FROM AUTHOR] |
