| Autor: |
Van Roermund, Arthur H. M., Casier, Herman, Steyaert, Michiel, Van Der Goes, F. M. L., Mulder, J., Ward, C. M., Lin, C.-H., Kruse, D., Westra, J. R., Lugthart, M., Arslan, E., Bajdechi, O., Van De Plassche, R. J., Bult, K. |
| Zdroj: |
Analog Circuit Design; 2006, p53-71, 19p |
| Abstrakt: |
This paper presents a two-step subranging ADC architecture based on interpolation, averaging, offset compensation and pipelining techniques. Application of these techniques results in fast and power-efficient converters with an accuracy between 8b and 12b. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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