| Autor: |
Parker, Clinton H., Quint, David W., Bois, Karl Joseph |
| Zdroj: |
Research Disclosure; Oct2006, Issue 510, p1317-1320, 4p, 5 Diagrams |
| Abstrakt: |
Described is a method for generating an electrical model of a through-hole via in a printed circuit beard A via pair, including a signal via and a ground via, is partitioned into a plurality of cells, wherein pairs of ground planes in the printed circuit board correspond to cell boundaries. One of the cells is then modeled in terms of inductance and capacitance. An LC model of one of the cells is generated by calculating the capacitance and inductance for a Cell. Each of the cells is then represented in terms of the LC model; and each of the LC-modeled cells is concatenated to generate the through-hole via model. [ABSTRACT FROM AUTHOR] |
| Databáze: |
Supplemental Index |
| Externí odkaz: |
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