Considering variation and aging in a full chip design methodology at system level.
Autor: | Helms, Domenik, Gruttner, Kim, Eilers, Reef, Metzdorf, Malte, Hylla, Kai, Poppen, Frank, Nebel, Wolfgang |
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Zdroj: | Proceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn); 2014, p1-6, 6p |
Databáze: | Complementary Index |
Externí odkaz: |