Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits.
| Autor: | Meher, Pramod K., Mohanty, Basant K., Srikanthan, Thambipillai |
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| Zdroj: | 2014 IEEE International Symposium on Circuits & Systems (ISCAS); 2014, p2628-2631, 4p |
| Databáze: | Complementary Index |
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