Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.
| Autor: | Tamura, Hikaru, Kato, Kiyoshi, Ishizu, Takahiko, Onuki, Tatsuya, Uesugi, Wataru, Ohmaru, Takuro, Ohshima, Kazuaki, Kobayashi, Hidetomo, Yoneda, Seiichi, Isobe, Atsuo, Tsutsui, Naoaki, Hondo, Suguru, Suzuki, Yasutaka, Okazaki, Yutaka, Atsumi, Tomoaki, Shionoiri, Yutaka, Maehashi, Yukio, Goto, Gensuke, Fujita, Masahiro, Myers, James |
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| Zdroj: | 2014 IEEE COOL Chips XVII; 2014, p1-3, 3p |
| Databáze: | Complementary Index |
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