STAG: Spintronic-Tape Architecture for GPGPU cache hierarchies.
| Autor: | Venkatesan, Rangharajan, Ramasubramanian, Shankar Ganesh, Venkataramani, Swagath, Roy, Kaushik, Raghunathan, Anand |
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| Zdroj: | 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA); 2014, p253-264, 12p |
| Databáze: | Complementary Index |
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