| Autor: |
Vijay, Kumar M P, Shreyas, Grama Srinath, Nidhi, Karuna, Agarwal, Neelam, Kumar, Ankit, Sheu, Gene, Yang, Shao-Ming, Mrinal, Aryadeep |
| Zdroj: |
2013 IEEE 8th Nanotechnology Materials & Devices Conference (NMDC); 2013, p74-77, 4p |
| Abstrakt: |
A novel super-junction (SJ) MOSFET based on charge compensation outperforms its conventional counterpart. Several fabrication technologies such as COOLMOS, STM, Multiepitaxy, Sidewall doping technique have been implemented earlier to realize SJ devices. However, its production is limited due to various shortcomings namely, costly fabrication process and inter-diffusion problems. To address both issues and to obtain better performance and process technology for super-junction MOSFET devices, a novel Polyflanked Super-junction (PF-SJ) structure is proposed as an alternative process technology to realize SJ MOSFET. TCAD simulation of the poly-filled trench SJ was done successfully and is reported to break the conventional MOSFET silicon limit for power MOSFET. This structure yields a simple way to realize the SJ performance in a typical production process. Both of its on-state and off-state characteristics are studied taking into account several possibilities of fabrication imperfections, viz., variation in trench etch angle, n and p column concentration for varied trench depths. The results establish the superior performance of PF-SJ compared to the conventional high voltage MOS structure. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
|
