High-Speed Low-Power VLSI Architecture for SPST-Equipped Booth Multiplier Using Modified Carry Look Ahead Adder.
Autor: | Mudhenagudi, Pratima S., Sugur, Narayan V., Siddamal, Saroja V., Banakar, R. M. |
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Zdroj: | Emerging Research in Electronics, Computer Science & Technology; 2014, p461-469, 9p |
Databáze: | Complementary Index |
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