High Speed Low Power VLSI Architecture for SPST Adder Using Modified Carry Look Ahead Adder.
| Autor: | Narayan, V. S., Pratima, S. M., Saroja, V. S., Banakar, R. M. |
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| Zdroj: | Proceedings of International Conference on Advances in Computing; 2012, p461-466, 6p |
| Databáze: | Complementary Index |
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