Analog Front End and FPGA Based Soft IP Core for ECG Logger.
| Autor: | Kamat, Rajanish K., Shinde, Santosh A., Gaikwad, Pawan K., Guhilot, Hansraj |
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| Zdroj: | Harnessing VLSI System Design with EDA Tools; 2012, p51-91, 41p |
| Databáze: | Complementary Index |
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