Timing verification using statically sensitizable paths.

Autor: Benkoski, J., Vanden Meersch, E., Claesen, L.J.M., De Man, H.
Zdroj: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; 1990, Vol. 9 Issue 10, p10723-10784, 12p
Databáze: Complementary Index