Design of low power and high speed comparator with sub-32-nm Double Gate-MOSFET.
Autor: | Bhumireddy, V.R., Shaik, K.A., Amara, A., Sen, S., Parikh, C.D., Nagchoudhuri, D., Ioinovici, A. |
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Zdroj: | 2013 IEEE International Conference on Circuits & Systems (ICCAS); 2013, p1-4, 4p |
Databáze: | Complementary Index |
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