Timing-constrained minimum area/power FPGA memory mapping.
Autor: | Du, Fangqing, Lin, Colin Yu, Cui, Xiuhai, Sun, Jiabin, Liu, Feng, Liu, Fei, Yang, Haigang |
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Zdroj: | 2013 23rd International Conference on Field programmable Logic & Applications; 2013, p1-4, 4p |
Databáze: | Complementary Index |
Externí odkaz: |