A study of new type CMOS inverter with Gated-IIP load and TFET driver for 22nm technology node.
| Autor: | Huang, Hsueh-Liang, Lin, Jyi-Tsong, Tsai, Chen-Chi, Chen, Kuan-Yu, Lu, You-Ren, Hsu, Shih-Wen, Lin, Po-Hsieh |
|---|---|
| Zdroj: | 2013 13th International Workshop on Junction Technology (IWJT); 2013, p109-113, 5p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|