A low jitter 0.3-165 MHz CMOS PLL frequency synthesizer for 3 V/5 V operation.
Autor: | Yang, H.C., Lee, L.K., Co, R.S. |
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Zdroj: | IEEE Journal of Solid-State Circuits; 1997, Vol. 32 Issue 4, p582-586, 5p |
Databáze: | Complementary Index |
Externí odkaz: |