A 21-ns 32 K/spl times/8 CMOS static RAM with a selectively pumped p-well array.
Autor: | Wang, K.L., Bader, M.D., Soorholtz, V.W., Mauntel, R.W., Mendez, H.J., Voss, P.H., Kung, R.I. |
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Zdroj: | IEEE Journal of Solid-State Circuits; 1987, Vol. 22 Issue 5, p704-711, 8p |
Databáze: | Complementary Index |
Externí odkaz: |