A 16 DIP, 64 kbit, static MOS-RAM.
| Autor: | Wada, T., Yamanaka, H., Sakamoto, M., Yamamoto, H., Matsue, S. |
|---|---|
| Zdroj: | IEEE Journal of Solid-State Circuits; 1981, Vol. 16 Issue 5, p488-491, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
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| Autor: | Wada, T., Yamanaka, H., Sakamoto, M., Yamamoto, H., Matsue, S. |
|---|---|
| Zdroj: | IEEE Journal of Solid-State Circuits; 1981, Vol. 16 Issue 5, p488-491, 4p |
| Databáze: | Complementary Index |
| Externí odkaz: |
|