CMOS-SRAM soft-error simulation system.
Autor: | Satoh, S., Sudo, R., Tashiro, H., Higaki, N., Yamaguchi, S., Nakayama, N. |
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Zdroj: | Proceedings of International Workshop on Numerical Modeling of processes & Devices for Integrated Circuits: NUPAD V; 1994, p181-184, 4p |
Databáze: | Complementary Index |
Externí odkaz: |