CMOS-SRAM soft-error simulation system.

Autor: Satoh, S., Sudo, R., Tashiro, H., Higaki, N., Yamaguchi, S., Nakayama, N.
Zdroj: Proceedings of International Workshop on Numerical Modeling of processes & Devices for Integrated Circuits: NUPAD V; 1994, p181-184, 4p
Databáze: Complementary Index