The impact of intermetal dielectric layer and high temperature bake test on the reliability of nonvolatile memory devices.
| Autor: | Sakagami, E., Arai, N., Tsunoda, H., Egawa, H., Yamaguchi, Y., Kamiya, E., Takebuchi, M., Yamada, K., Yoshikawa, K., Mori, S. |
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| Zdroj: | Proceedings of 1994 IEEE International Reliability Physics Symposium; 1994, p359-367, 9p |
| Databáze: | Complementary Index |
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