A 1.5 V 10-bit 25 MSPS pipelined A/D converter.
Autor: | Hee Cheol Choi, Ho-Jin Park, Sung-Sik Hwang, Shin-Kyu Bae, Jae-Whui Kim, Chung, P. |
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Zdroj: | AP-ASIC'99 First IEEE Asia Pacific Conference on ASICs (Cat No99EX360); 1999, p170-173, 4p |
Databáze: | Complementary Index |
Externí odkaz: |