A 1.5 V 10-bit 25 MSPS pipelined A/D converter.

Autor: Hee Cheol Choi, Ho-Jin Park, Sung-Sik Hwang, Shin-Kyu Bae, Jae-Whui Kim, Chung, P.
Zdroj: AP-ASIC'99 First IEEE Asia Pacific Conference on ASICs (Cat No99EX360); 1999, p170-173, 4p
Databáze: Complementary Index