A dual execution pipelined floating-point CMOS processor.
| Autor: | Kowaleski, J.A., Wolrich, G.M., Fischer, T.C., Dupcak, R.J., Kroesen, P.L., Tung Pham, Olesin, A. |
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| Zdroj: | 1996 IEEE International Solid-State Circuits Conference Digest of TEchnical Papers, ISSCC; 1996, p358-359, 2p |
| Databáze: | Complementary Index |
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