A 33ns 64Mb DRAM.
Autor: | Oowaki, Y., Tsuchida, K., Watanabe, Y., Takashima, D., Ohta, M., Nakano, H., Watanabe, S., Nitayama, A., Horiguchi, F., Ohuchi, K., Masuoka, F., Hara, H. |
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Zdroj: | 1991 IEEE International Solid-State Circuits Conference Digest of Technical Papers; 1991, p114-299, 186p |
Databáze: | Complementary Index |
Externí odkaz: |