Via-middle through-silicon via with integrated airgap to zero TSV-induced stress impact on device performance.

Autor: Civale, Yann, Van Huylenbroeck, Stefaan, Redolfi, Augusto, Guo, Wei, Gavan, Khashayar Babaei, Jaenen, Patrick, Manna, Antonio La, Beyer, Gerald, Swinnen, Bart, Beyne, Eric
Zdroj: 2013 IEEE 63rd Electronic Components & Technology Conference; 2013, p1420-1424, 5p
Databáze: Complementary Index