Measurement of back end of line thermal resistance for 3D chip stacks.
| Autor: | Colgan, E. G., Polastre, R. J., Knickerbocker, J., Wakil, J., Gambino, J., Tallman, K. |
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| Zdroj: | 29th IEEE Semiconductor Thermal Measurement & Management Symposium; 2013, p23-28, 6p |
| Databáze: | Complementary Index |
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