Thermal design guidelines for a three-dimensional (3D) chip stack, including cooling solutions.

Autor: Matsumoto, Keiji, Ibaraki, Soichiro, Sueoka, Kuniaki, Sakuma, Katsuyuki, Kikuchi, Hidekazu, Orii, Yasumitsu, Yamada, Fumiaki, Fujihara, Kohei, Takamatsu, Junichi, Kondo, Koji
Zdroj: 29th IEEE Semiconductor Thermal Measurement & Management Symposium; 2013, p1-6, 6p
Databáze: Complementary Index