A built-in electrical test circuit for interconnect tests in assembled PCBs.
Autor: | Widianto, Yotsuyanagi, Hiroyuki, Ono, Akira, Takagi, Masao, Roth, Zvi, Hashizume, Masaki |
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Zdroj: | 2012 2nd IEEE CPMT Symposium Japan; 2012, p1-4, 4p |
Databáze: | Complementary Index |
Externí odkaz: |