32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS.
| Autor: | Doi, Yoshiyasu, Shibasaki, Takayuki, Danjo, Takumi, Chaivipas, Win, Hashida, Takushi, Miyaoka, Hiroki, Hoshino, Masanori, Koyanagi, Yoichi, Yamamoto, Takuji, Tsukamoto, Sanroku, Tamura, Hirotaka |
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| Zdroj: | 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers; 2013, p36-37, 2p |
| Databáze: | Complementary Index |
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