| Autor: |
Sourdis, I., Strydis, C., Bouganis, C.S., Falsafi, B., Gaydadjiev, G.N., Malek, A., Mariani, R., Pnevmatikatos, D., Pradhan, D.K., Rauwerda, G., Sunesen, K., Tzilis, S. |
| Zdroj: |
2012 15th Euromicro Conference on Digital System Design; 1/ 1/2012, p335-342, 8p |
| Abstrakt: |
The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect-/fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe will deliver a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. [ABSTRACT FROM PUBLISHER] |
| Databáze: |
Complementary Index |
| Externí odkaz: |
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